Sci1 Interrupts - Renesas Hitachi H8S/2194 Series Hardware Manual

16-bit single-chip microcomputer
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23.4

SCI1 Interrupts

The SCI1 has four interrupt sources: the transmit-end interrupt (TEI) request, receive-error
interrupt (ERI) request, receive-data-full interrupt (RXI) request, and transmit-data-empty
interrupt (TXI) request. Table 23.13 shows the interrupt sources and their relative priorities.
Individual interrupt sources can be enabled or disabled with the TIE, RIE, and TEIE bits in
SCR1. Each kind of interrupt request is sent to the interrupt controller independently.
When the TDRE flag in SSR1 is set to 1, a TXI interrupt request is generated. When the TEND
flag in SSR1 is set to 1, a TEI interrupt request is generated.
When the RDRF flag in SSR1 is set to 1, an RXI interrupt request is generated. When the
ORER, PER, or FER flag in SSR1 is set to 1, an ERI interrupt request is generated.
Table 23.13 SCI1 Interrupt Sources
Channel
Interrupt Source
1
ERI
RXI
TXI
TEI
The TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. The
TEND flag is cleared at the same time as the TDRE flag. Consequently, if a TEI interrupt and a
TXI interrupt are requested simultaneously, the TXI interrupt will have priority for acceptance,
and the TDRE flag and TEND flag may be cleared. Note that the TEI interrupt will not be
accepted in this case.
Rev. 2.0, 11/00, page 494 of 1037
Description
Interrupt by receive error (ORER, FER, or PER)
Interrupt by receive data register full (RDRF)
Interrupt by transmit data register empty (TDRE)
Interrupt by transmit end (TEND)
Priority*
High
Low

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