Renesas Hitachi H8S/2194 Series Hardware Manual page 839

Bit 2: Capstan Speed Error Detection (OVF, latch) Interrupt Permission Bit (IECAP1)
Bit 2
IECAP1 Description
0 Prohibits the interrupt request through IRRCAP1
1 Permits the interrupt request through IRRCAP1
Bit 1: HSW Timing Generation (counter clear, capture) Interrupt Permission bit
(IEHSW2)
Bit 1
IEHSW2 Description
0 Prohibits the interrupt request through IRRHSW2
1 Permits the interrupt request through IRRHSW2
Bit 0: HSW Timing Generation (OVW, matching, STRIG) Interrupt Permission bit
(IEHSW1)
Bit 0
IEHSW1 Description
0 Prohibits the interrupt request through IRRHSW1
1 Permits the interrupt request through IRRHSW1
Rev. 2.0, 11/00, page 812 of 1037
(Initial value)
(Initial value)
(Initial value)