Renesas Hitachi H8S/2194 Series Hardware Manual page 834

16-bit single-chip microcomputer
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SEPH
c
H counter
a
b
H'00
OVF
H'E8
a
H reload
counter
c
period
Noise mask for
H counter
OSCH
Mask
period
Noise mask for
OSCH
Noise detection
window
Period determined
by NWR5 to NWR0
period deter-
mined
by a and a
[Legend]
SEPH
: Horizontal sync signal after detection
OSCH
: Horizontal sync signal after supplement
a
: Value set for the noise detection window (NWR5 to NWR0)
b
: Value set for the pulse width of the horizontal sync signal (NPWR3 to NPWR0)
c
: Value set for supplement timing (HRTR7 to HRTR0)
a, b, c
: Complements of 1 of a,b,c, respectively
H ' E 8
:Complement of 2 of multiplier 24 in the equation for the noise mask period
(The noise mask period ends 24 counts before the overflow of H reload counter.)
TH
: Cycle of the horizontal sync signal
(NTSC:63.6 [ms], PAL:64[ms])
TM
: Timing at which the noise mask period ends.
Figure 28.75 Set Period for HRTR, HPWR and NWR
Drop-out of the horizontal
sync signal
TH
Don't mask
immediately
Mask
Mask
after
period
supplement
TM
Mask
period
Period determined
by HRTR7 to HRTR0
period determined
by c and H'E8
Ignore signal during noise
mask period.
TH
Mask
Mask
period
period
Mask
Mask
period
period
Do mask also im-
mediately after
supplement.
Period determined
by HPWR3 to HPER0
period
determined
by b
Rev. 2.0, 11/00, page 807 of 1037

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