Rts Instruction; Sleep Instruction - Renesas Hitachi H8S/2194 Series Hardware Manual

16-bit single-chip microcomputer
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27.3.7

RTS Instruction

When the trap address is the next instruction to the RTS instruction, transition is made to the
address trap interrupt after reading the CCR and PC from the stack and prefetching the
instruction at the return location. The address to be stacked is 0298.
RTS
instruc-
tion
pre-fetch
Address bus
02AC
Break interrupt
request signal
27.3.8

SLEEP Instruction

(1) SLEEP Instruction 1
When the trap address is the SLEEP instruction and the instruction execution cycle
immediately preceding the SLEEP instruction is that of 2 states or more and prefetch does
not occur in the last state, the SLEEP instruction is not executed and transition is made to the
address trap interrupt without going into SLEEP mode. The address to be stacked is 0274.
MOV
instruc-
tion
pre-fetch
Address bus
0272
Interrupt
request
signal
Rev. 2.0, 11/00, page 604 of 1037
Internal
NOP
Stack
opera-
instruc-
storing
tion
tion
pre-fetch
02AE
SP
SP+2
SP
RTS execution
Figure 27.15 RTS Instruction
Data
SLEEP
NOP
instruc-
instruc-
write
tion
tion
pre-fetch
pre-fetch
0274
FFF9
0276
MOV
SLEEP
execution
cancel
Figure 27.16 SLEEP Instruction (1)
NOP
Start of
instruc-
exception
tion
handling
pre-fetch
0298
029A
Start of
exception
handling
SP-2
SP-4
0296
BSR SUB
0298
NOP
029A
NOP
:
02AC
*
02AE
* Trap setting address
The underlines address is the
one to be actually stacked.
0272
MOV.B R2L, @FFF8
*
0274
SLEEP
0276
NOP
0278
NOP
:
:
* Trap setting address
The underlines address is the
one to be actually stacked.
:
RTS
NOP

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