Renesas Hitachi H8S/2194 Series Hardware Manual page 700

(1) Example of operation in single mode (20 stages of FIFO used)
(a) Set to single mode (LOP = 0)
(b) Write the output pattern data (PA0) to FPDRA.
(c) Write the output timing (t
initializes the output pattern data to PA0.
(d) Repeat the steps in the same way, until PA1, PA2, etc., are set.
(e) Write the output pattern data (PB0) to FPDRB.
(f) Write the output timing (t
initializes the output pattern data to PB0.
(g) Repeat these steps in the same way, until PB1, PB2, etc., are set.
From (c), the pattern data of PA0 is output.
If t matches with the timer counter, the pattern data of PA1 is output.
A1
If t matches with the timer counter, the pattern data of PA2 is output.
A2
.
.
.
) to FTPRA. tA1 is written in FIFO1 together with PA0. This
A1
) to FTPRB. t is written in FIFO2 together with PB0. This
B1 B1
Rev. 2.0, 11/00, page 673 of 1037