Precautions When Using The Timer X1; Competition Between Writing And Clearing With The Frc - Renesas Hitachi H8S/2194 Series Hardware Manual

17.7

Precautions when Using the Timer X1

Pay great attention to the fact that the following competitions and operations occur during
operation of the Timer X1.
17.7.1

Competition between Writing and Clearing with the FRC

When a counter clearing signal is issued under the T2 state where the FRC is under the writing
cycle, writing into the FRC will not be effected and the priority will be given to clearing of the
FRC.
Figure 17.13 shows the timing chart in this case.
Figure 17.13 Competition between Writing and Clearing with the FRC
Writing cycle with the FRC
Address
Internal writing
signal
Counter clearing
signal
FRC
T1 T2
FRC address
N
Rev. 2.0, 11/00, page 385 of 1037
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