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Figure 6.3 shows the timing of IRQnF setting.
Internal
IRQn
input pin
IRQnF
The vector numbers for IRQ5 to IRQ0 interrupt exception handling are 21 to 26.
Upon detection of IRQ5 to IRQ0 interrupts, the applicable pin is set in the port mode register 1
(PMR1) as ,54Q pin.
Figure 6.3 Timing of IRQnF Setting
Rev. 2.0, 11/00, page 107 of 1037
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