Jmp Instruction - Renesas Hitachi H8S/2194 Series Hardware Manual

16-bit single-chip microcomputer
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27.3.6

JMP Instruction

(1) JMP Instruction (Register indirect)
When the trap address is the next instruction to the JMP instruction and the addressing mode
is a register indirect, transition is made to the address trap interrupt after prefetching the
instruction at the branch. The address to be stacked is 02AA.
JMP
instruc-
tion
pre-fetch
Address bus
029A
Interrupt
request
signal
(2) JMP Instruction (Memory indirect)
When the trap address is the next instruction to the JMP instruction and the addressing mode
is memory indirect, transition is made to the address trap interrupt after prefetching the
instruction at the branch. The address to be stacked is 02E4.
JMP
instruc-
tion
pre-fetch
Address bus
0294
Interrupt
request
signal
NOP
MOV
Data
instruc-
instruc-
tion
tion
fetch
pre-fetch
pre-fetch
029C
02A4
02A6
02A8 02AA
JMP
MOV.L
execution
execution
Figure 27.13 JMP Instruction (Register Indirect)
NOP
Internal
Data
instruc-
opera-
fetch
tion
tion
pre-fetch
0296
006C
006E
006C 02E4
JMP execution
Figure 27.14 JMP Instruction (Memory Indirect)
NOP
Start of
instruc-
exception
tion
pre-fetch
handling
02AC
NOP
Start of
instruc-
exception
tion
handling
pre-fetch
02E6
Rev. 2.0, 11/00, page 603 of 1037
(@ER0 = H'02A4)
029A
JMP @ER0
*
029C
NOP
029E
NOP
02A0
NOP
02A2
NOP
02A4
MOV.L #DATA, ER1
02AA
NOP
* Trap setting address
The underlines address is the
one to be actually stacked.
006C
H'02E4
:
:
0294
JMP @@H'6C:8
*
0296
NOP
0298
NOP
:
:
02E4
NOP
02E6
NOP
* Trap setting address
The underlines address is the
one to be actually stacked.

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