Internal Block Diagram - Renesas Hitachi H8S/2194 Series Hardware Manual

1.2

Internal Block Diagram

An internal block diagram of the chip is shown in figure 1.1.
P27/SCK2
P26/SO2
P25/SI2
P24/SCL
P23/SDA
P22/SCK1
P21/SO1
P20/SI1
P17/TMOW
P16/IC
P15/IRQ5
P14/IRQ4
P13/IRQ3
P12/IRQ2
P11/IRQ1
P10/IRQ0
P07/AN7
P06/AN6
P05/AN5
P04/AN4
P03/AN3
P02/AN2
P01/AN1
P00/AN0
AN8
AN9
ANA
ANB
AV
CC
AV
SS
P87
P86
P85
P84
P83/SV2
P82/SV1
P81/EXCAP
P80/EXTTRG
Figure 1.1 Internal Block Diagram of H8S/2194 Series
Rev. 2.0, 11/00, page 6 of 1037
H8S/2000 CPU
Internal data bus
R O M
Internal address bus
R A M
Address trap
Interrupt controller
controller
8-bit PWM
Prescaler unit
Watchdog timer
Timer A
Timer L
Timer B
S C I 1
Timer J
S C I 2
2
I C bus
interface
Timer R
A/D converter
Timer X1
Servo circuit
14-bit PWM
Servo pins (CTL input/output
amplifier, three-level output, etc.)
Bus
controller
P37/TMO
P36/BUZZ
P35/PWM3
P34/PWM2
P33/PWM1
P32/PWM0
P31/STRB
P30/CS
P47
P46/FTOB
P45/FTOA
P44/FTID
P43/FTIC
P42/FTIB
P41/FTIA
P40/PWM14
P53/TRIG
P52/TMBI
P51
P50/ADTRG
P67/RP7
P66/RP6
P65/RP5
P64/RP4
P63/RP3
P62/RP2
P61/RP1
P60/RP0
P77/PPG7
P76/PPG6
P75/PPG5
P74/PPG4
P73/PPG3
P72/PPG2
P71/PPG1
P70/PPG0