Renesas Hitachi H8S/2194 Series Hardware Manual page 994

H'D118: Timer R Mode Register 1 TMRM1: Timer R
7
Bit :
CLR2
0
Initial value :
R/W
R/W :
TMRU-2 clear select bit
0
1
6 5
AC/BR RLD RLCK
0 0
R/W R/W R/W
TMRU-2 reload timing select bit
Execution/non-execution of reload by TMRU-2
0 TMRU-2 is not used as reload timer
1 TMRU-2 is used as reload timer
Acceleration/deceleration select bit
0 Deceleration
1 Acceleration
TMRU-2 is not cleard at the time of capture
TMRU-2 is cleard at the time of capture
4 3 2
PS21 PS20
0 0 0
R/W R/W
TMRU-1 capture signal select bit
TMRU-1 operation mode select bit
0 TMRU-1 functions as reload timer
1 TMRU-1 functions as capture timer
TMRU-2 clock source select bits
PS21 PS20
0 0
1
1 0
1
0 Reload at CFG rising edge
1 Reload at TMRU underflow
1 0
RLD/CAP CPS
0 0
R/W R/W
0 Capture signal at CFG rising edge
1 Capture signal at IRQ3 edge
TMRU-2 clock source select
Count at TMRU-1 underflow
PSS, count at φ/256
PSS, count at φ/128
PSS, count at φ/64
Rev. 2.0, 11/00, page 967 of 1037