Renesas Hitachi H8S/2194 Series Hardware Manual page 800

16-bit single-chip microcomputer
Table of Contents

Advertisement

(2) VASS Detect Mode
VASS detection is carried out by the duty discriminator. Software can detect index
sequences by reading the duty I/O flag at each CTL pulse.
At each CTL pulse, the duty discriminator sends the result of duty discrimination to the duty
I/O flag, and simultaneously generates an interrupt request. The duty I/O flag is cleared to 0
if the CTL pulse is a 1 (duty cycle below 43%), and is set to 1 if the CTL pulse is a 0 (duty
cycle equal to or above 44%).
The duty I/O flag is modified at each CTL pulse. It should be read by the interrupt-handling
routine within the period of the PB-CTL signal. The VASS detection format is illustrated in
figure 28.58.
Tape direction
1
1 1 1 1 1 1 1 1 1 1
(3) Assemble (ASM) Mark Detect Mode
ASM mark detection is carried out by the duty discriminator. If the duty discriminator
detects that the duty cycle of the PB-CTL signal is 66% or higher, it generates an interrupt
request, and simultaneously clears the duty I/O flag to 0.
The duty I/O flag is updated at every CTL pulse. It should be read by the interrupt-handling
routine within the period of the PB-CTL signal.
Header (11 bits)
Figure 28.58 VASS (Index) Format
M
L
M
L
S
S
S
S
B
B
B
B
Thousands
Hundreds
Data (16 bits: 4 digits of 4-bit BCD)
Rev. 2.0, 11/00, page 773 of 1037
Written three times
M
L
M
L
S
S
S
S
B
B
B
B
Tens
Ones

Advertisement

Table of Contents
loading

Table of Contents