Section 23 Serial Communication Interface 1 (Sci1); Overview; Features - Renesas Hitachi H8S/2194 Series Hardware Manual

Section 23 Serial Communication Interface 1 (SCI1)

23.1

Overview

The serial communication interface 1 (SCI1) can handle both asynchronous and clocked
synchronous serial communication. A function is also provided for serial communication
between processors (multiprocessor communication function).
23.1.1

Features

SCI1 features are listed below.
(1) Choice of asynchronous or clock synchronous serial communication mode
(a) Asynchronous mode
• Serial data communication is executed using an asynchronous system in which
synchronization is achieved character by character
Serial data communication can be carried out with standard asynchronous
communication chips such as a Universal Asynchronous Receiver/Transmitter
(UART) or Asynchronous Communication Interface Adapter (ACIA)
• A multiprocessor communication function is provided that enables serial data
communication with a number of processors
• Choice of 12 serial data transfer formats
Data length: 7 or 8 bits
Stop bit length: 1 or 2 bits
Parity: Even, odd, or none
Multiprocessor bit: 1 or 0
• Receive error detection: Parity, overrun, and framing errors
• Break detection: Break can be detected by reading the SI1 pin level directly in case of
a framing error
(b) Clock synchronous mode
• Serial data communication is synchronized with a clock
Serial data communication can be carried out with other chips that have a
synchronous communication function
• One serial data transfer format
Data length: 8 bits
• Receive error detection: Overrun errors detected
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