Renesas Hitachi H8S/2194 Series Hardware Manual page 488

16-bit single-chip microcomputer
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The BRR1 setting is found from the following equations.
• Asynchronous mode:
N=
64×2
• Clock synchronous mode:
N=
8×2
Where
B: Bit rate (bits/s)
N: BRR1 setting for baud rate generator (0 ≤ N ≤ 255)
φ: Operating frequency (MHz)
n:
Baud rate generator input clock (n = 0 to 3)
(See the table below for the relation between n and the clock.)
n
0
1
2
3
The bit rate error in asynchronous mode is found from the following equation:
Error (%) = {
(N+1) × B × 64 × 2
Table 23.5 shows the maximum bit rate for each frequency in asynchronous mode. Tables 23.6
and 23.7 show the maximum bit rates with external clock input.
φ
×10
6−1
×B
2n−1
φ
×10
6−1
×B
2n−1
Clock
φ
φ/4
φ/16
φ/64
φ × 10
6
− 1 } × 100
2n−1
SMR1 Setting
CKS1
0
0
1
1
Rev. 2.0, 11/00, page 461 of 1037
CKS0
0
1
0
1

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