Renesas Hitachi H8S/2194 Series Hardware Manual page 422

16-bit single-chip microcomputer
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Bit 7: Overflow Flag (OVF)
A status flag that indicates that WTCNT has overflowed from H'FF to H'00.
Bit 7
OVF
Description
0
[Clearing conditions]
(1) Write 0 in the TME bit
(2) Read WTCSR when OVF = 1, then write 0 in OVF
1
[Setting condition]
When WTCNT overflows (changes from H'FF to H'00)
When internal reset request generation is selected in watchdog timer mode, OVF is
cleared automatically by the internal reset
Bit 6: Timer Mode Select (WT/
Selects whether the WDT is used as a watchdog timer or interval timer. If used as an interval
timer, the WDT generates an interval timer interrupt request (WOVI) when TCNT overflows. If
used as a watchdog timer, the WDT generates a reset or NMI interrupt when TCNT overflows.
Bit 6
WT/
Description
,7
,7
0
Interval timer mode: Sends the CPU an interval timer interrupt request (WOVI) when
WTCNT overflows
1
Watchdog timer mode: Sends the CPU a reset or NMI interrupt request when
WTCNT overflows
Bit 5: Timer Enable (TME)
Selects whether WTCNT runs or is halted.
Bit 5
TME
Description
0
WTCNT is initialized to H'00 and halted
1
WTCNT counts
Bit 4: Reset Select (RSTS)
Reserved. This bit should not be set to 1.
)
,7
,7
(Initial value)
(Initial value)
(Initial value)
Rev. 2.0, 11/00, page 395 of 1037

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