Jsr Instruction - Renesas Hitachi H8S/2194 Series Hardware Manual

16-bit single-chip microcomputer
Table of Contents

Advertisement

27.3.5

JSR Instruction

(1) JSR Instruction (Register indirect)
When the trap address is the next instruction to the JSR instruction and the addressing mode
is a register indirect, transition is made to the address trap interrupt after prefetching the
instruction at the branch. The address to be stacked is 02C8.
JSR
instruc-
tion
pre-fetch
Address bus
029A
Interrupt
request
signal
(2) JSR Instruction (Memory indirect)
When the trap address is the next instruction to the JSR instruction and the addressing mode
is memory indirect, transition is made to the address trap interrupt after prefetching the
instruction at the branch. The address to be stacked is 02EA.
JSR
instruc-
tion
pre-fetch
Address bus
0294
Interrupt
request
signal
Rev. 2.0, 11/00, page 602 of 1037
NOP
MOV
Stack
instruc-
instruc-
saving
tion
tion
pre-fetch
pre-fetch
029C
02C8
SP-2
SP-4
JSRexecution
Figure 27.11 JSR Instruction (Register indirect)
NOP
Data
Stack
instruc-
tion
fetch
saving
pre-fetch
0296
006C
006E
SP-2 SP-4 02EA
JSR execution
Figure 27.12 JSR Instruction (Memory Indirect)
Start of
exception
handling
*
02CA
NOP
Start of
instruc-
exception
tion
pre-fetch
handling
02EC
(@ER0 = H'02C8)
029A
JSR @ER0
029C
NOP
029E
NOP
:
:
02C8
MOV.W R4, @OUT
02CE
NOP
* Trap setting address
The underlines address is the
one to be actually stacked.
006C
H'02EA
:
:
0294
JSR @@H'6C:8
*
0296
NOP
0298
NOP
:
:
02EA
NOP
02EC
NOP
* Trap setting address
The underlines address is the
one to be actually stacked.

Advertisement

Table of Contents
loading

Table of Contents