Register Configuration - Renesas Hitachi H8S/2194 Series Hardware Manual

28.8.3

Register Configuration

Table 28.11 shows the register configuration of the capstan speed error detector.
Table 28.11 Register Configuration
Name
CFG speed preset data
register
CFG speed error data
register
CFG lock UPPER data
register
CFG lock LOWER data
register
Capstan speed error
detection control register
Abbrev. R/W
CFPR W
CFER R/W
CFRUDR W
CFRLDR W
CFVCR R/W
Size Initial Value
Word H'0000
Word H'0000
Word H'7FFF
Word H'8000
Byte H'00
Rev. 2.0, 11/00, page 703 of 1037
Address
H'FD050
H'FD052
H'FD054
H'FD056
H'FD058