Renesas Hitachi H8S/2194 Series Hardware Manual page 64

Table 2.5 Logic Instructions
Instruction Size
AND B/W/L
OR B/W/L
XOR B/W/L
NOT B/W/L
Note: * Size refers to the operand size.
B: Byte
W: Word
L: Longword
Table 2.6 Shift Instructions
Instruction Size
SHAL B/W/L
SHAR
SHLL B/W/L
SHLR
ROTL B/W/L
ROTR
ROTXL B/W/L
ROTXR
Note: Size refers to the operand size.
*
B: Byte
W: Word
L: Longword
*
Function
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and
another general register or immediate data
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and
another general register or immediate data
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register
and another general register or immediate data
~ Rd → Rd
Takes the one's complement (logical complement) of general
register contents
*
Function
Rd (shift) → Rd
Performs an arithmetic shift on general register contents
A 1-bit or 2-bit shift is possible
Rd (shift) → Rd
Performs a logical shift on general register contents
A 1-bit or 2-bit shift is possible
Rd (rotate) → Rd
Rotates general register contents
1-bit or 2-bit rotation is possible
Rd (rotate) → Rd
Rotates general register contents through the carry flag
1-bit or 2-bit rotation is possible
Rev. 2.0, 11/00, page 37 of 1037