Renesas Hitachi H8S/2194 Series Hardware Manual page 611

16-bit single-chip microcomputer
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Bit 2: Busy Flag (BUSY)
During hardware- or external-triggered A/D conversion, if software attempts to start A/D
conversion by writing to the SST bit, the SST bit is not modified and instead the BUSY flag is
set to 1.
This flag is cleared when the hardware-triggered A/D result register (AHR) is read.
Bit 2
BUSY
Description
0
No contention for A/D conversion
1
Indicates an attempt to execute software-triggered A/D conversion while hardware-
or external-triggered A/D conversion was in progress
Bit 1: Software-Triggered Conversion Cancel Flag (SCNL)
Indicates that software-triggered A/D conversion was canceled by the start of hardware-triggered
A/D conversion.
This flag is cleared when A/D conversion is started by software.
Bit 1
SCNL
Description
0
No contention for A/D conversion
1
Indicates that software-triggered A/D conversion was canceled by the start of
hardware-triggered A/D conversion
Bit 0: Reserved
This bit cannot be modified and always reads 1. Writes are disabled.
Rev. 2.0, 11/00, page 584 of 1037
(Initial value)
(Initial value)

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