Renesas Hitachi H8S/2194 Series Hardware Manual page 68

Table 2.9 System Control Instructions
Instruction Size

TRAPA

RTE

SLEEP
LDC B/W
STC B/W
ANDC B
ORC B
XORC B

NOP
Note: Size refers to the operand size.
*
B: Byte
W: Word
*
Function
Starts trap-instruction exception handling
Returns from an exception-handling routine
Causes a transition to a power-down state
(EAs) → CCR, (EAs) → EXR
Moves contents of a general register or memory or immediate
data to CCR or EXR. Although CCR and EXR are 8-bit
registers, word-size transfers are performed between them and
memory. The upper 8 bits are valid
CCR → (EAd), EXR → (EAd)
Transfers CCR or EXR contents to a general register or
memory. Although CCR and EXR are 8-bit registers, word-size
transfers are performed between them and memory. The upper
8 bits are valid
CCR ∧ #IMM → CCR, EXR ∧ #IMM → EXR
Logically ANDs the CCR or EXR contents with immediate data
CCR∨ #IMM → CCR, EXR∨ #IMM → EXR
Logically ORs the CCR or EXR contents with immediate data
CCR ⊕ #IMM → CCR, EXR ⊕ #IMM → EXR
Logically exclusive-ORs the CCR or EXR contents with
immediate data
PC + 2 → PC
Only increments the program counter
Rev. 2.0, 11/00, page 41 of 1037