Renesas Hitachi H8S/2194 Series Hardware Manual page 550

16-bit single-chip microcomputer
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If the number of bits in a frame, excluding the acknowledge bit, is less than 8, transmit data and
receive data are stored differently. Transmit data should be written justified toward the MSB
side when MLS = 0, and toward the LSB side when MLS = 1. Receive data bits read from the
LSB side should be treated as valid when MLS = 0, and bits read from the MSB side when MLS
= 1.
ICDR is assigned to the same address as SARX, and can be written and read only when the ICE
bit is set to 1 in ICCR.
The value of ICDR is undefined after a reset.
The TDRE and RDRF flags are set and cleared under the conditions shown below. Setting the
TDRE and RDRF flags affects the status of the interrupt flags.
TDRE
Description
0
The next transmit data is in ICDR (ICDRT), or transmission cannot be started
[Clearing conditions]
(1) When transmit data is written in ICDR (ICDRT) in transmit mode (TRS = 1)
(2) When a stop condition is detected in the bus line state after a stop condition is
issued with the I
(3) When a stop condition is detected with the I
(4) In receive mode (TRS = 0)
(A 0 write to TRS during transfer is valid after reception of a frame containing an
acknowledge bit)
1
The next transmit data can be written in ICDR (ICDRT)
[Setting conditions]
(1) In transmit mode (TRS = 1), when a start condition is detected in the bus line
state after a start condition is issued in master mode with the I
serial format selected
(2) When data is transferred from ICDRT to ICDRS
(Data transfer from ICDRT to ICDRS when TRS = 1 and TDRE = 0, and ICDRS
is empty)
(3) When a switch is made from receive mode (TRS = 0) to transmit mode (TRS = 1)
after detection of a start condition
RDRF
Description
0
The data in ICDR (ICDRR) is invalid
[Clearing condition]
When ICDR (ICDRR) receive data is read in receive mode
1
The ICDR (ICDRR) receive data can be read
[Setting condition]
When data is transferred from ICDRS to ICDRR
(Data transfer from ICDRS to ICDRR in case of normal termination with TRS = 0
and RDRF = 0)
2
C bus format or serial format selected
2
C bus format selected
2
C bus format or
Rev. 2.0, 11/00, page 523 of 1037
(Initial value)
(Initial value)

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