Descriptions Of Respective Registers; Timer Mode Register J (Tmj) - Renesas Hitachi H8S/2194 Series Hardware Manual

14.2

Descriptions of Respective Registers

14.2.1

Timer Mode Register J (TMJ)

Bit :
PS11
Initial value :
R/W : R/W
The timer mode register J (TMJ) works to select the inputting clock for the TMJ-1 and TMJ-2
and to set the operation mode.
The TMJ is an 8-bit register and Bit-1 is for read only and all the remaining bits are applicable
to read/write.
When reset, the TMJ is initialized to H'00.
Under all other modes than the remote controlling mode, writing into the TMJ works to initialize
the counters (TCJ and TCK) to H'FF.
Bits 7 and 6: Selecting the Inputting Clock to the TMJ-1 (PS11 and PS10)
These bits work to select the clock to input to the TMJ-1. Selection of the rising edge or the
falling edge is workable for counting by use of an external clock.
Bit 7 Bit 6
PS11 PS10
0 0
1
1 0
1
Note: The edge selection for the external clock inputs is made by setting the edge select
*
register (IEGR). See section 6.2.4, Edge Select Register (IEGR) for more information.
When using an external clock under the remote controlling mode, set the opposite
edge with the IRQ1 and the IRQ2 when using an external clock under the remote
controlling mode. (When IRQ1 falling, select IRQ2 rising and when IRQ1 rising, select
IRQ2 falling)
Rev. 2.0, 11/00, page 306 of 1037
7 6 5
PS10 ST
0 0 0
R/W R/W
Description
Counting by the PSS, φ/512
Counting by the PSS, φ/256
Counting by the PSS, φ/4
Counting at the rising edge or the falling edge of the external clock
,54
inputs (
4 3
8/16 PS21
0 0
R/W R/W
) *
2 1 0
PS20 TGL T/R
0 0 0
R/W R R/W
(Initial value)