Reeling Controls; Slow Tracking Mono-Multi Function - Renesas Hitachi H8S/2194 Series Hardware Manual

16.5.2

Reeling Controls

CFG counts can be captured by making 16-bit capturing operation combining the TMRU-1 and
TMRU-2. By choosing the IRQ3 as the capture signal, and by counting the CFG within the duration
of the reel pulse being input through the ,54 pin, reeling controls, etc. can be effected.
• Exemplary settings
(1) Setting P13/ ,54 pin as the ,54 pin
Set the PMR13 bit (Bit 3) of the port mode register 1 (PMR1) to 1. See section 22.2.2,
Port Mode Register (PMR1).
(2) Setting the timer R mode register 1 (TMRM1)
CLR2 bit (Bit 7) = 1: Works to clear after making the TMRU-2 capture.
PS21 and PS20 (Bits 3 and 2) = (0 and 0): The underflowing signals of the TMRU-1 are
to be used as the clock source for the TMRU-2.
RLD/CAP bit (Bit 1) = 1: The TMRU-1 has been set to make the capturing operation.
CPS bit (Bit 0) = 1: The edge of the IRQ3 signal is to be used as the capture signal for the
TMRU-1 and TMRU-2.
(3) Setting the timer R mode register 2 (TMRM2)
LAT bit (Bit 7) = 1: The edge of the IRQ3 signal is to be used as the capture signal for
the TMRU-1 and TMRU-2.
PS11 and PS10 (Bits 6 and 5) = (0 and 0): The rising edge of the CFG signal is to be used
as the clock source for the TMRU-1.
CP/SLM bit (Bit 2) = 0: The capture signal is to work to issue the TMRI3 interrupt
request.
16.5.3

Slow Tracking Mono-multi Function

When performing slow reproductions or still reproductions, the braking timing for the capstan
motor is determined by use of the edge of the DVCTL signal. The slow tracking mono-multi
function works to measure the time from the leading edge of the DVCTL signal down to the
desired point to issue the interrupt request. In actual programming, this interrupt should be used
to activate the brake of the capstan motor. The TMRU-3 should be used to perform time
measurements for the slow tracking mono-multi function. Also, the braking process can be
made using the TMRU-2.
• Exemplary settings
(1) Setting the timer R mode register 2 (TMRM2)
PS31 and PS30 (Bits 4 and 3) = Other than (0, 0): The dividing clock is to be used as the
clock source for the TMRU-3.
CP/SLM bit (Bit 2) = 1: The slow tracking delay signal is to work to issue the TMRI3
interrupt request.
Rev. 2.0, 11/00, page 352 of 1037