Erase Block Registers 1 And 2 (Ebr1, Ebr2) - Renesas Hitachi H8S/2194 Series Hardware Manual

7.3.3

Erase Block Registers 1 and 2 (EBR1, EBR2)

7
Bit :
—
EBR1 :
0
Initial value :
—
R/W :
Bit :
7
EBR2 :
EB7
Initial value :
0
R/W :
R/W
EBR1 and EBR2 are registers that specify the flash memory erase area block by block; bits 1
and 0 in EBR1 (128-kbyte versions only) and bits 7 to 0 in EBR2 are readable/writable bits.
EBR1 and EBR2 are each initialized to H'00 by a reset, in power-down state (excluding the
medium-speed mode, module stop mode, and sleep mode), when a low level is input to the FWE
pin, or when a high level is input to the FWE pin and the SWE bit in FLMCR1 is not set. When
a bit in EBR1 or EBR2 is set, the corresponding block can be erased. Other blocks are erase-
protected. Set only one bit in EBR1 or EBR2 (more than one bit cannot be set).
The flash memory block configuration is shown in table 7.4.
Table 7.4 Flash Memory Erase Blocks
Block (Size)
128-kbyte Versions
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbyte)
EB4 (28 kbytes)
EB5 (16 kbytes)
EB6 (8 kbytes)
EB7 (8 kbytes)
EB8 (32 kbytes)
EB9 (32 kbytes)
Rev. 2.0, 11/00, page 136 of 1037
6 5
— — —
0 0
— — —
6 5
EB6 EB5 EB4
0 0
R/W R/W R/W
4 3 2
— —
0 0 0
— —
4 3 2
EB3 EB2
0 0 0
R/W R/W
Address
H'000000 to H'0003FF
H'000400 to H'0007FF
H'000800 to H'000BFF
H'000C00 to H'000FFF
H'001000 to H'007FFF
H'008000 to H'00BFFF
H'00C000 to H'00DFFF
H'00E000 to H'00FFFF
H'010000 to H'017FFF
H'018000 to H'01FFFF
1 0
EB9 EB8
0 0
R/W R/W
1 0
EB1 EB0
0 0
R/W R/W