Block Diagram - Renesas Hitachi H8S/2194 Series Hardware Manual

18.1.2

Block Diagram

Figure 18.1 shows block diagram of WDT.
WOVI
(Interrupt request signal)
Internal NMI
interrupt request signal
Internal reset signal *
[Legend]
: Timer control/status register
WTCSR
: Timer counter
WTCNT
Note: * The internal reset signal can be generated by means of a register setting.
Rev. 2.0, 11/00, page 392 of 1037
Interrupt
control
Overflow
•
Reset
control
WTCNT
Module bus
Figure 18.1 Block Diagram of WDT
Clock
Clock
select
WTCSR
WDT
/ 2
/ 64
/ 128
/ 512
/ 2048
/ 8192
/ 32768
/ 131072
Internal clock
source
Bus
interface