Renesas Hitachi H8S/2194 Series Hardware Manual page 697

• Loop Mode
In loop mode, the output pattern cycles repeatedly from stage 0 through the final stage
selected in the HSW loop number setting register. As in single mode, the output pattern
data is output each time the timing data matches. In loop mode, the FIFO data is
retained.
When loop mode is active, data can be rewritten for each FIFO group.
After confirming with the OFG bit of the HSW mode register 2 which FIFO group is
outputting, clear the FIFO group which is not outputting and write data for the entire
FIFO group. Writing has to be completed before the rewritten FIFO group starts
operation.
Partial rewriting in the FIFO is not possible, because the write pointer is outside the loop
stages.
Figures 28.23 and 28.24 show examples of the timing waveform and its operation of the
HSW timing generator.
Rev. 2.0, 11/00, page 670 of 1037