16.1.3
Pin Configuration
Table 16.1 shows the pin configuration of the Timer R.
Table 16.1 Pin Configuration
Name
Input capture inputting pin
16.1.4
Register Configuration
Table 16.2 shows the register configuration of the Timer R.
Table 16.2 Register Configuration
Name
Timer R mode register 1
Timer R mode register 2
Timer R control/status
register
Timer R capture register 1
Timer R capture register 2
Timer R load register 1
Timer R load register 2
Timer R load register 3
Note: Memories of respective registers will be preserved even under the low power consumption
mode. Nonetheless, the CAPF flag and SLW flag of the TMRM2 will be cleared to 0.
Abbrev.
I/O
,54
Input
Abbrev.
R/W
TMRM1
R/W
TMRM2
R/W
TMRCS
R/W
TMRCP1
R
TMRCP2
R
TMRL1
W
TMRL2
W
TMRL3
W
Function
Input capture inputting for the Timer R
Size
Initial Value
Byte
H'00
Byte
H'00
Byte
H'03
Byte
H'FF
Byte
H'FF
Byte
H'FF
Byte
H'FF
Byte
H'FF
Rev. 2.0, 11/00, page 333 of 1037
Address
H'D118
H'D119
H'D11F
H'D11A
H'D11B
H'D11C
H'D11D
H'D11E