Renesas Hitachi H8S/2194 Series Hardware Manual page 482

Bit 5: Overrun Error (ORER)
Indicates that an overrun error occurred during reception, causing abnormal termination.
Bit 5
ORER Description
0 [Clearing conditions]
When 0 is written in ORER after reading ORER = 1
1 [Setting conditions]
When the next serial reception is completed while RDRF = 1
Notes: 1. The ORER flag is not affected and retains its previous state when the RE bit in SCR1
is cleared to 0.
2. The receive data prior to the overrun error is retained in RDR1, and the data received
subsequently is lost. Also, subsequent serial reception cannot be continued while the
ORER flag is set to 1. In clock synchronous mode, serial transmission cannot be
continued, either.
Bit 4: Framing Error (FER)
Indicates that a framing error occurred during reception in asynchronous mode, causing
abnormal termination.
Bit 4
FER Description
0 [Clearing conditions]
When 0 is written in FER after reading FER = 1
1 [Setting conditions]
When the SCI1 checks the stop bit at the end of the receive data when reception
ends, and the stop bit is 0
Notes: 1. The FER flag is not affected and retains its previous state when the RE bit in SCR1 is
cleared to 0.
2. In 2-stop-bit mode, only the first stop bit is checked for a value of 1; the second stop
bit is not checked. If a framing error occurs, the receive data is transferred to RDR1
but the RDRF flag is not set. Also, subsequent serial reception cannot be continued
while the FER flag is set to 1. In clock synchronous mode, serial transmission cannot
be continued, either.
*2
(Initial value)
*2
(Initial value)
Rev. 2.0, 11/00, page 455 of 1037
*1
*1