Renesas Hitachi H8S/2194 Series Hardware Manual page 980

H'D0B9: Servo Interrupt Enable Register 2 SIENR2: Servo Interrupt
Bit :
7
—
Initial value :
1
—
R/W :
6 5 4
— — —
1 1 1
— — —
3 2 1
— —
IESNC
1 1 0
— —
R/W
Vertical sync signal interrupt enable bit
0 Interrupt (vertical sync signal interrupt)
request is disabled by IRRSNC
1 Interrupt (vertical sync signal interrupt)
request is enabled by IRRSNC
Rev. 2.0, 11/00, page 953 of 1037
0
IECTL
0
R/W
CTL interrupt enable bit
0 Interrupt request is
disabled by IRRCTL
1 Interrupt request is
enabled by IRRCTL