Renesas Hitachi H8S/2194 Series Hardware Manual page 977

16-bit single-chip microcomputer
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H'D0B1: Horizontal Sync Signal Threshold Value Register HTR: Sync Detector (Servo)
Bit :
7
Initial value :
1
R/W :
H'D0B2: H Pulse Adjustment Start Time Setting Register HRTR: Sync Detector (Servo)
Bit :
7
HRTR7
Initial value :
0
R/W :
W
H'D0B3: H Pulse Width Setting Register HPWR: Sync Detector (Servo)
Bit :
7
Initial value :
1
R/W :
H'D0B4: Noise Detection Window Setting Register NWR: Sync Detector (Servo)
Bit :
7
Initial value :
1
R/W :
H'D0B5: Noise Detection Register NDR: Sync Detector (Servo)
Bit :
7
NDR7
Initial value :
0
R/W :
W
Rev. 2.0, 11/00, page 950 of 1037
6
5
1
1
6
5
HRTR6
HRTR5
HRTR4
0
0
W
W
6
5
1
1
6
5
NWR5
NWR4
1
0
W
6
5
NDR6
NDR5
NDR4
0
0
W
W
4
3
2
HTR3
HTR2
1
0
0
W
W
4
3
2
HRTR3
HRTR2
0
0
0
W
W
W
4
3
2
HPWR3
HPWR2
1
0
0
W
W
4
3
2
NWR3
NWR2
0
0
0
W
W
W
4
3
2
NDR3
NDR2
0
0
0
W
W
W
1
0
HTR1
HTR0
0
0
W
W
1
0
HRTR1
HRTR0
0
0
W
W
1
0
HPWR1
HPWR0
0
0
W
W
1
0
NWR1
NWR0
0
0
W
W
1
0
NDR1
NDR0
0
0
W
W

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