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(3) Offsets (DOfp, DOfs, COfp, COfs)
15
Bit :
Initial value :
*
R/W :
W
Note: * Initial value is uncertain.
These registers are 16-bit write-only buffers that set the offset level of digital filter output. They
cannot be read. They can be accessed by word access only. Byte access gives unassured results.
If read is attempted, an undetermined value is read out.
These registers are not initialized by a reset or in standby mode. Be sure to write data in them
before processing starts.
In this digital filter, output gain adjustment (×1, 2, 4, 8 ,16, 32, 64) after offset adding is
enabled. Take output gain into account when setting accumulation gain.
(4) Delay Initialization Registers (CZp, CZs, DZp, DZs)
Bit :
15
Initial value :
1
R/W :
—
The delay initialization register is a 16-bit write-only register. It accepts only a word-access. If
a byte access is attempted, operation is not assured. If a read is attempted, an undefined value is
read out. Bits 12 to 15 are reserved, and no write in them is valid.
It is initialized to H'F000 by a reset, stand-by or module stop. The MSB of 12-bit data (bit 11) is
a sign bit.
-1
Loading to Z
is performed automatically by bits 4 and 3 of CFIC and DFIC (CZPON, CZSON,
DZPON, DZSON). Writing in register is always available, but loading in Z
when the digital filter is performing calculation processing in relation to such register. In such a
-1
case, loading to Z
will be done the next time computation begins.
14
13
12
11
10
*
*
*
*
*
W
W
W
W
W
14
13
12
11
10
1
1
1
0
0
W
W
—
—
—
9
8
7
6
5
*
*
*
*
*
W
W
W
W
W
9
8
7
6
5
0
0
0
0
0
W
W
W
W
W
Rev. 2.0, 11/00, page 729 of 1037
4
3
2
1
0
*
*
*
*
*
W
W
W
W
W
4
3
2
1
0
0
0
0
0
0
W
W
W
W
W
-1
is not possible
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