Low-Power Control Register (Lpwrcr) - Renesas Hitachi H8S/2194 Series Hardware Manual

10.2.2

Low-Power Control Register (LPWRCR)

7
Bit :
DTON
0
Initial value :
R/W
R/W :
LPWRCR is an 8-bit readable/writable register that performs power-down mode control.
Only bit 1 and 0 is described here. For a description of the other bits, see section 4.2.2, Low-
Power Control Register (LPWRCR).
LPWRCR is initialized to H'00 by a reset.
Bits 1 and 0: Subactive Mode Clock Select (SA1, SA0)
Selects CPU clock for subactive mode. In subactive mode, writes are disabled.
Bit 1 Bit 0
SA1 SA0
0 0
1
1
*
Note: Don't care
*
6 5
LSON NESEL
0 0
R/W R/W
Description
CPU operating clock is φw/8
CPU operating clock is φw/4
CPU operating clock is φw/2
4 3 2
— — —
0 0 0
— — —
Rev. 2.0, 11/00, page 225 of 1037
1 0
SA1 SA0
0 0
R/W R/W
(Initial value)