Renesas Hitachi H8S/2194 Series Hardware Manual page 940

Register
Address *
Name R/W
H'D0B0 VTR W
H'D0B1 HTR W
H'D0B2 HRTR W
H'D0B3 HPWR W
H'D0B4 NWR W
H'D0B5 NDR W
H'D0B6 SYNCR R/W
H'D0B8 SIENR1 R/W
H'D0B9 SIENR2 R/W
H'D0BA SIRQR1 R/W
H'D0BB SIRQR2 R/W
H'D0C0 32 byte Data R/W
Buffer
H'D0C1 R/W
H'D0C2 R/W
H'D0C3 R/W
H'D0C4 R/W
H'D0C5 R/W
H'D0C6 R/W
H'D0C7 R/W
H'D0C8 R/W
H'D0C9 R/W
H'D0CA R/W
H'D0CB R/W
H'D0CC R/W
H'D0CD R/W
H'D0CE R/W
H'D0CF R/W
H'D0D0 32 byte Data R/W
Buffer
H'D0D1 R/W
H'D0D2 R/W
H'D0D3 R/W
H'D0D4 R/W
H'D0D5 R/W
H'D0D6 R/W
H'D0D7 R/W
H'D0D8 R/W
H'D0D9 R/W
H'D0DA R/W
H'D0DB R/W
H'D0DC R/W
H'D0DD R/W
H'D0DE R/W
H'D0DF R/W
H'D0E0 STAR R/W
H'D0E1 EDAR R/W
H'D0E2 SCR2 R/W
H'D0E3 SCSR2 R/W
Bus
Access Width 7 6
− −
8 16
− −
8 16
8 16 HRTR7 HRTR6
− −
8 16
− −
8 16
8 16 NDR7 NDR6
− −
8 16
8 16 IEDR3 IEDR2
− −
8 16
8 16 IRRDRM3 IRRDRM2
− −
8 16
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
8 8
− −
8 8
− −
8 8
8 8 TEIE ABTIE
−
8 8 TEI
5 4 3
VTR5 VTR4 VTR3
− −
HTR3
HRTR5 HRTR4 HRTR3
− −
HPWR3
NWR5 NWR4 NWR3
NDR5 NDR4 NDR3
− −
NID/VD
IEDR1 IECAP3 IECAP2
− − −
IRRDRM1 IRRCAP3 IRRCAP2
− − −
−
STA4 STA3
−
EDA4 EDA3
−
GAP1 GAP0
−
SOL ORER
Rev. 2.0, 11/00, page 913 of 1037
2 1 0
VTR2 VTR1 VTR0
HTR2 HTR1 HTR0
HRTR2 HRTR1 HRTR0
HPWR2 HPWR1 HPWR0
NWR2 NWR1 NWR0
NDR2 NDR1 NDR0
NOIS FLD SYCT
IECAP1 IEHSW2 IEHSW1
−
IESNC IESTL
IRRCAP1 IRRHSW2 IRRHSW1
−
IRRSNC IRRCTL
STA2 STA1 STA0
EDA2 EDA1 EDA0
CKS2 CKS1 CKS0
WT ABT STF
Module
Name
Sync
detector
Servo
interrupt
control
32-byte
buffer SCI2
32-byte
buffer SCI2
32-byte
buffer SCI2