Register Configuration - Renesas Hitachi H8S/2194 Series Hardware Manual

28.6.3

Register Configuration

Table 28.9 shows the register configuration of the drum speed error detector.
Table 28.9 Register Configuration
Name
Specified DFG speed
preset data register
DFG speed error data
register
DFG lock UPPER data
register
DFG lock LOWER data
register
Drum speed error
detection control register
Abbrev. R/W
DFPR W
DFER R/W
DFRUDR W
DFRLDR W
DFVCR R/W
Size Initial Value
Word H'0000
Word H'0000
Word H'7FFF
Word H'8000
Byte H'00
Rev. 2.0, 11/00, page 683 of 1037
Address
H'FD030
H'FD032
H'FD034
H'FD036
H'FD038