Module Stop Mode - Renesas Hitachi H8S/2194 Series Hardware Manual

4.5

Module Stop Mode

4.5.1 Module Stop Mode
Module stop mode can be set for individual on-chip supporting modules.
When the corresponding MSTP bit in MSTPCR is set to 1, module operation stops at the end of
the bus cycle and a transition is made to module stop mode. The CPU continues operating
independently.
Table 4.4 shows MSTP bits and the on-chip supporting modules.
When the corresponding MSTP bit is cleared to 0, module stop mode is cleared and the module
starts operating again at the end of the bus cycle. In module stop mode, the internal states of
modules other than the SCI1, A/D converter, Timer X1, and Servo circuit, are retained.
After reset release, all modules are in module stop mode.
When an on-chip supporting module is in module stop mode, read/write access to its registers is
disabled.
Table 4.4 MSTP Bits and Corresponding On-Chip Supporting Modules
Register Bit
MSTPCRH MSTP15
MSTP14
MSTP13
MSTP12
MSTP11
MSTP10
MSTP9
MSTP8
MSTPCRL MSTP7
MSTP6
MSTP5
MSTP4
MSTP3
MSTP2
MSTP1
MSTP0
Rev. 2.0, 11/00, page 80 of 1037
Module
Timer A
Timer B
Timer J
Timer L
Timer R
Timer X1

Serial communication interface 1 (SCI1)
Serial communication interface 2 (SCI2)
2
I C bus interface (IIC)
14-bit PWM
8-bit PWM

A/D converter
Servo circuit, 12-bit PWM
