Operation; Reload Timer Counter Equipped With Capturing Function Tmru-1 - Renesas Hitachi H8S/2194 Series Hardware Manual

16-bit single-chip microcomputer
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16.3

Operation

16.3.1

Reload Timer Counter Equipped with Capturing Function TMRU-1

The reload timer counter equipped with capturing function, TMRU-1, consists of an 8-bit down-
counter, a reloading register and a capture register.
The clock source can be selected from among the leading edge of the CFG signals and three
types of dividing clocks. It is also selectable whether using it as a reload counter or as a capture
counter. Even when the capturing function is selected, the counter readings can be updated by
writing the values into the reloading register.
When the counter underflows, the TMRI1 interrupt request will be issued.
The initial values of the TMRU-1 counter, reloading register and capturing register are all H'FF.
(1) Operation of the Reload Timer
When a value is written into to the reloading register, the same value will be written into the
counter simultaneously. Also, when the counter underflows, the reloading register value will
be reloaded to the counter. The TMRU-1 is a dividing circuit for the CFG. In combination
with the TMRU-2 and TMRU-3, it can also be used for the mode identification purpose.
(2) Capturing Operation
Capturing operation is carried out in combination with the TMRU-2 using the combined 16
bits. It can be so programmed that the counter may be cleared by the capture signal. The
CFG edges or IRQ3 edges are used as the capture signals. It is possible to issue the TMRI3
interrupt request by the capture signal.
In addition to the capturing function being worked out in combination with the TMRU-2, the
TMRU-1 can be used as a 16-bit CFG counter. Selecting the IRQ3 as the capture signal, the
CFG within the duration of the reel pulse being input into the ,54 pin can be counted by
the TMRU-1.
Rev. 2.0, 11/00, page 345 of 1037

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