Renesas Hitachi H8S/2194 Series Hardware Manual page 560

Bit 4
TRS Description
0 Receive mode
[Clearing conditions]
(1) When 0 is written by software (in cases other than setting condition 3)
(2) When 0 is written in TRS after reading TRS = 1 (in case of setting condition 3)
(3) When bus arbitration is lost after transmission is started in I
mode
1 Transmit mode
[Setting conditions]
(1) When 1 is written by software (in cases other than clearing conditions 3)
(2) When 1 is written in TRS after reading TRS = 0 (in case of clearing conditions 3)
(3) When a 1 is received as the R/W bit of the first frame in I
mode
Bit 3: Acknowledge Bit Judgement Selection (ACKE)
Specifies whether the value of the acknowledge bit returned from the receiving device when
2
using the I C bus format is to be ignored and continuous transfer is performed, or transfer is to be
aborted and error handling, etc., performed if the acknowledge bit is 1. When the ACKE bit is
0, the value of the received acknowledge bit is not indicated by the ACKB bit, which is always
0.
When the ACKE bit is 0, the TDRE, IRIC, and IRTR flags are set on completion of data
transmission, regardless of the value of the acknowledge bit. When the ACKE bit is 1, the
TDRE, IRIC, and IRTR flags are set on completion of data transmission when the acknowledge
bit is 0, and the IRIC flag alone is set on completion of data transmission when the acknowledge
bit is 1.
Depending on the receiving device, the acknowledge bit may be significant, in indicating
completion of processing of the received data, for instance, or may be fixed at 1 and have no
significance.
Bit 3
ACKE Description
0 The value of the acknowledge bit is ignored, and continuous transfer is performed
1 If the acknowledge bit is 1, continuous transfer is interrupted
(Initial value)
2
C bus format master
2
C bus format slave
(Initial value)
Rev. 2.0, 11/00, page 533 of 1037