26.2.5
Trigger Select Register (ADTSR)
7
Bit :
—
Initial value :
1
R/W :
—
The trigger select register (ADTSR) selects hardware- or external-triggered A/D conversion start
factor.
ADTSR is an 8-bit readable/writable register that is initialized to H'FC by a reset, and in module
stop mode, standby mode, watch mode, subactive mode and subsleep mode.
Bits 7 to 2: Reserved
These bits are reserved and are always read as 1. Writes are disabled.
Bits 1 and 0: Trigger Select
These bits select hardware- or external-triggered A/D conversion start factor. Set these bits
when A/D conversion is not in progress.
Bit 1
Bit 0
TRGS1
TRGS0
0
0
1
1
0
1
26.2.6
Port Mode Register 0 (PMR0)
Bit :
7
PMR07
Initial value :
0
R/W :
R/W
Port mode register 0 (PMR0) controls switching of each pin function of port 0. Switching is
specified for each bit.
PMR0 is an 8-bit readable/writable register and is initialized to H'00 by a reset.
Bit 7 to 0: P07/AN7 to P00/AN0 pin switching (PMR07 to PMR00)
These bits set the P0n/ANn pin as the input pin for P0n or as the ANn pin for A/D conversion
analog input channel.
6
5
—
—
1
1
—
—
Description
Hardware- or external-triggered A/D conversion is disabled
Hardware-triggered (ADTRG) A/D conversion is selected
Hardware-triggered (DFG) A/D conversion is selected
$'75*
External-triggered (
6
5
PMR06
PMR05
PMR04
0
0
R/W
R/W
4
3
—
—
1
1
—
—
—
) A/D conversion is selected
4
3
PMR03
PMR02
0
0
R/W
R/W
R/W
Rev. 2.0, 11/00, page 585 of 1037
2
1
0
—
TRGS1
TRGS0
1
0
0
R/W
R/W
(Initial value)
2
1
0
PMR01
PMR00
0
0
0
R/W
R/W