Renesas Hitachi H8S/2194 Series Hardware Manual page 795

16-bit single-chip microcomputer
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(2) PB-CTL Waveform Shaper in Slow Mode Operation
If bit 0 in the CTL control register (CTCR) is set to slow mode, slow reset function is
activated. In slow mode, if the falling edge is not detected within the specified time from
rising edge detection, PB-CTL is forcibly shut down (slow reset).
The time T
(s) until the signal falls is the following interval after the rising edge of the
FS
internal CTL signal is detected:
= 16384 × 4φ s
T
FS
When f
= 10 MHz, T
OSC
Figure 28.54 shows the PB-CTL waveform in slow mode.
CTL waveform
Internal CTL signal
Accelera-
tion
Figure 28.54 PB-CTL Waveform in Slow Mode Operation
Rev. 2.0, 11/00, page 768 of 1037
(φs = f
/2)
OSC
= 13.1 ms.
FS
1 frame
Slow reset
CTLP
Decelera-
tion
Slow tracking delay
Stop
1 frame
CTLP
Accelera-
Decelera-
tion
tion
Slow tracking delay
1 frame
CTLP
Accelera-
tion
Slow tracking delay
Stop

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