Renesas Hitachi H8S/2194 Series Hardware Manual page 766

Xn
+
Res
USn
-
A
DAs15 to 0
DAp15 to 0
16
CAs15 to 0
CAp15 to 0
W
Note: MSB of 12-bit data to be written in the delay initialization register is a sign bit.
Figure 28.42 Z
+
Usn-1
24 8
Delay initialization
-1
Z
+
-1
Z initiali-
zation bit
DZSON
DZPON
CZSON
CZSON
W
Internal bus
-1
Initialization Circuit
Vn
DZs11 to 0
DZp11 to 0
CZs11 to 0
CZp11 to 0
register
12
B
DBs15 to 0
DBp15 to 0
16
CBs15 to 0
CBp15 to 0
W W
Rev. 2.0, 11/00, page 739 of 1037