Renesas Hitachi H8S/2194 Series Hardware Manual page 744

(b) Interrupt request
IRRCAP3 is generated by the DVCTL or DVCFG2 signal latch and the overflow of the error
detection counter.
CAPREF30
PB-CTL
DVCTL
or
DVCFG2
Counter
Preset value
Figure 28.35 Capstan Phase Control in Playback Mode
REF30P
or
CREF
DVCFG2
Counter
Preset value
Figure 28.36 Capstan Phase Control in Record Mode
Preset
Latch
Preset
Latch
Preset
Latch
Preset
Rev. 2.0, 11/00, page 717 of 1037
Latch