Pwm Data Registers U And L (Pwdru, Pwdrl) - Renesas Hitachi H8S/2194 Series Hardware Manual

21.2.2

PWM Data Registers U and L (PWDRU, PWDRL)

(1) PWDRU
Bit :
7
—
1
Initial value :
R/W :
—
(2) PWDRL
7
Bit :
PWDRL7
Initial value : 0
R/W : W
PWM data registers U and L (PWDRU and PWDRL) indicate high level width in one PWN
waveform cycle.
PWDRU and PWDRL form a 14-bit write-only register, with the upper 6 bits assigned to
PWDRU and the lower 8 bits to PWDRL. The value written in PWDRU and PWDRL gives the
total high-level width of one PWM waveform cycle. Both PWDRU and PWDRL are accessible
by byte access only. Word access gives unassured results.
When 14-bit data is written in PWDRU and PWDRL, the contents are latched in the PWM
waveform generator and the PWM waveform generation data is updated. When writing the 14-
bit data, follow these steps:
(1) Write the lower 8 bits to PWDRL.
(2) Write the upper 6 bits to PWDRU.
Write the data first to PWDRL and then to PWDRU.
PWDRU and PWDRL are write-only registers. When read, all bits always read 1.
PWDRU and PWDRL are initialized to H'C000 by a reset.
6 5
—
PWDRU5 PWDRU4
1 0
W
—
6 5
PWDRL6 PWDRL5 PWDRL4
0 0
W W
4 3 2
PWDRU3 PWDRU2
0 0 0
W W W
4 3 2
PWDRL3 PWDRL2
0 0 0
W W W
Rev. 2.0, 11/00, page 427 of 1037
1 0
PWDRU1 PWDRU0
0 0
W W
1 0
PWDRL1 PWDRL0
0 0
W W