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16.3.2
Reload Timer Counter Equipped with Capturing Function TMRU-2
The reload timer counter equipped with capturing function, TMRU-2, consists of an 8-bit down-
counter, a reloading register and a capture register.
The clock source can be selected from among the undedrflowing signal of the TMRU-1 and
three types of dividing clocks. Also, although the reloading function is workable during its
capturing operation, equipping or not of the reloading function is selectable. Even when
without-reloading-function is chosen, the counter reading can be updated by writing the values
to the reloading register.
When the counter underflows, the TMRI2 interrupt request will be issued.
The initial values of the TMRU-2 counter, reloading register and capturing register are all H'FF.
(1) Operation of the Reload Timer
When a value is written into to the reloading register, the same value will be written into the
counter, simultaneously. Also, when the counter underflows, the reloading register value
will be reloaded to the counter.
The TMRU-2 can make acceleration and braking work for the capstan motor using the reload
timer operation.
(2) Capturing Operation
Using the capture signals, the counter reading can be latched into the capturing register. As
the capture signal, you can choose from among edges of the CFG, edges of the IRQ3 or the
underflow signals of the TMRU-3. It is possible to issue the TMRI3 interrupt request by the
capture signal.
The capturing function (stopping the reloading function) of the TMRU-2, in combination
with the TMRU-1 and TMRU-3, can also be used for the mode identification purpose.
16.3.3
Reload Counter Timer TMRU-3
The reload counter timer TMRU-3 consists of an 8-bit down-counter and a reloading register.
Its clock source can be selected from between the undedrflowing signal of the counter and the
edges of the DVCTL signals. (When the DVCTL signal is selected as the clock source,
reloading will be effected by the underflowing signals and when the dividing clock is selected as
the clock source, reloading will be effected by the DVCTL signals.) The reloading signal works
to reload the reloading register value into the counter. Also, when a value is written into to the
reloading register, the same value will be written into the counter, simultaneously.
The initial values of the counter and the reloading register are H'FF.
The underflowing signals can be used as the capturing signal for the TMRU-2.
The TMRU-3 can also be used as a dividing circuit for the DVCTL. Also, in combination with
the TMRU-1 and TMRU-2 (capturing function), the TMRU-3 can be used for the mode
identification purpose. Since the divided signals of the DVCTL are being used as the clock
source, CTL signals (DVCTL) conforming to the double speed can be input when making
Rev. 2.0, 11/00, page 346 of 1037
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