Renesas Hitachi H8S/2194 Series Hardware Manual page 827

• Example
The set values to detect the vertical and horizontal sync signals (SEPV and SEPH) from
Csync are required to meet the following conditions. Assumed that the set values in the
VTHR register were VVTH and HVTH,
(VVTH-1) × 2/φs > Hpuls
(HVTH-2) × 2/φs ≤ Hpuls/2 < (HVTH-1) ) × 2/φs
Where, Hpuls is pulse width (µs) of the horizontal sync signal, and φs is servo clock
(fosc/2).
Thus, if φs = 5 MHz, NTSC system is used,
(VVTH-1) × 0.4µs > 4.7µs
∴VVTH ≥ H'D
(HVTH-2) × 0.4µs ≤ 2.35µs < (HVTH-1) × 0.4µs
∴HVTH ≥ H'7
Note: This circuits detects the pulse with the width set in the VTHR register. If a noise pulse
with the width greater than the set value was input, the circuit regards that it detected a
sync signal.
Rev. 2.0, 11/00, page 800 of 1037