Renesas Hitachi H8S/2194 Series Hardware Manual page 569

16-bit single-chip microcomputer
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Bit 2: Slave Address Recognition Flag (AAS)
2
In I
C bus format slave receive mode, this flag is set to 1 if the first frame following a start
condition matches bits SVA6 to SVA0 in SAR, or if the general call address (H'00) is detected.
AAS is cleared by reading AAS after it has been set to 1, then writing 0 in AAS. In addition,
AAS is reset automatically by write access to ICDR in transmit mode, or read access to ICDR in
receive mode.
Bit 2
AAS
Description
0
Slave address or general call address not recognized
[Clearing conditions]
(1) When ICDR data is written (transmit mode) or read (receive mode)
(2) When 0 is written in AAS after reading AAS = 1
(3) In master mode
1
Slave address or general call address recognized
[Setting condition]
• When the slave address or general call address is detected in slave receive mode
Bit 1: General Call Address Recognition Flag (ADZ)
2
In I
C bus format slave receive mode, this flag is set to 1 if the first frame following a start
condition is the general call address (H'00).
ADZ is cleared by reading ADZ after it has been set to 1, then writing 0 in ADZ. In addition,
ADZ is reset automatically by write access to ICDR in transmit mode, or read access to ICDR in
receive mode.
Bit 1
ADZ
Description
0
General call address not recognized
[Clearing conditions]
(1) When ICDR data is written (transmit mode) or read (receive mode)
(2) When 0 is written in ADZ after reading ADZ = 1
(3) In master mode
1
General call address recognized
[Setting condition]
• If the general call address is detected when FSX = 0 or FS = 0 is selected in the
slave receive mode.
Rev. 2.0, 11/00, page 542 of 1037
(Initial value)
(Initial value)

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