Block Diagram - Renesas Hitachi H8S/2194 Series Hardware Manual

25.1.2

Block Diagram

Figure 25.1 shows a block diagram of the I
Figure 25.2 shows an example of I/O pin connections to external circuits. I/O pins are driven
only by NMOS and apparently function as NMOS open-drain outputs. However, applicable
voltages to input pins depend on the power (Vcc) voltage of this LSI.
PS
SCL
Noise
canceller
SDA
Noise
canceler
[Legend]
2
ICCR : I C control register
2
ICMR : I C mode register
2
ICSR : I C status register
2
ICDR : I C data register
SAR : Slave address register
SARX : Slave address register X
PS : Prescaler
Rev. 2.0, 11/00, page 518 of 1037
2
Clock
control
Bus state
decision
circuit
Arbitration
decision
circuit
Output data
control
circuit
Figure 25.1 Block Diagram of I
C bus interface.
comparator
SAR, SARX
2
C Bus Interface
ICCR
ICMR
ICSR
ICDRT
ICDRS
ICDRR
Address
Interrupt
generator
Interrupt
request