Renesas Hitachi H8S/2194 Series Hardware Manual page 922

16-bit single-chip microcomputer
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Instruction Mnemonic
SUBX
SUBX #xx:8,Rd
SUBX Rs,Rd
*
3
TAS
TAS @ERd
TRAPA
TRAPA #x:2
XOR
XOR.B #xx:8,Rd
XOR.B Rs,Rd
XOR.W #xx:16,Rd
XOR.W Rs,Rd
XOR.L #xx:32,ERd
XOR.L ERs,ERd
XORC
XORC #xx:8,CCR
XORC #xx:8,EXR
Notes: 1. 3 applies when EXR is valid, and 2 applies when invalid.
2. Applies when the transfer data is n bytes.
3. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
Branch
Instruction
Address
Fetch
Read
I
J
1
1
2
2
2
1
1
2
1
3
2
1
2
Stack
Byte Data
Operation
Access
K
L
2
1
*
2/3
Rev. 2.0, 11/00, page 895 of 1037
Word Data
Internal
Access
Operation
M
N
2

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