Competing Interrupt - Renesas Hitachi H8S/2194 Series Hardware Manual

(5) SLEEP Instruction 5 (Standby or Watch Mode Setting)
When the trap address is the next instruction to the SLEEP instruction, this puts in the
standby (watch) mode after execution of the SLEEP instruction. After that, if the standby
(watch) mode is cancelled by the NMI interruption, transition is made to the NMI interrupt
following the CCR and PC (at the address of 0266) stack saving and vector reading.
However, if the address trap interrupt arises before starting execution of the NMI interrupt
processing, transition is made to the address trap exception handling. The address to be
stacked is the starting address of the NMI interrupt processing.
NOP
instruc-
tion
pre-fetch
Address bus
0280 0282
Interrupt
request
signal
Figure 27.20 SLEEP Instruction (5) (Standby or Watch Mode Setting)
27.3.9

Competing Interrupt

(1) General Interrupt (Interrupt other than NMI)
When the ATC interrupt request is made at the timing in (1) (A) against the general interrupt
request, the interruption appears to take place in the ATC at the timing earlier than usual,
because higher priority is assigned to the ATC interrupt processing (Simultaneous interrupt
with the general interrupt has no effect on processing). The address to be stacked is 029E.
For comparison, the case where the trap address is set at 02A0 if no general interrupt request
was made is shown in (2). The address to be stacked is 02A4.
SLEEP
instruc-
tion
pre-fetch
0284
SLEEP Standby
execution mode
NMI
Address trap
interruption
interrupt
SP-2 SP-2
Rev. 2.0, 11/00, page 607 of 1037
0280 NOP
0282 SLEEP
* 0284 NOP
* Trap setting address