Table of Contents
Advertisement
H'D06F: Additional V Control Register ADDVR: Additional V Signal Generator
Bit :
7
—
Initial value :
1
R/W :
—
H'D070: X-Value Data Register XDR: X-Value, TRK-Value
Bit :
15
14
—
—
Initial value :
1
1
—
—
R/W :
H'D072: TRK-Value Data Register TRDR: X-Value, TRK-Value
15
14
Bit :
—
—
Initial value :
1
1
—
—
R/W :
6
5
4
—
—
HMSK
1
1
0
—
—
R/W
OSCH mask bit
0 OSCH added
1 OSCH not added
13
12
11
10
9
—
—
XD11 XD10
XD9 XD8
1
1
0
0
0
—
—
W
W
W
13
12
11
10
9
—
—
TRD11 TRD10
TRD9 TRD8
1
1
0
0
0
—
—
W
W
W
3
2
HiZ
CUT
0
0
R/W
R/W
Additional V output control bits
CUT
VPON
0
0
1
1
*
Note: * Don't care.
High impedance bit
0 3-level output from Vpulse pin
1 Vpulse pin is set as 3-state (H/L/HiZ) pin
8
7
6
5
XD7 XD6
XD5 XD4
0
0
0
0
W
W
W
W
8
7
6
5
TRD7 TRD6
TRD5 TRD4
0
0
0
0
W
W
W
W
Rev. 2.0, 11/00, page 937 of 1037
1
0
VPON
POL
0
0
R/W
R/W
POL
Description
Low level
*
0
Negative polarity (Figure 28.46)
1
Positive polarity (Figure 28.45)
0
Immediate level
(high-impedance when HiZ bit = 1)
1
High level
4
3
2
1
XD3 XD2
XD1 XD0
0
0
0
0
W
W
W
W
4
3
2
1
TRD3 TRD2
TRD1 TRD0
0
0
0
0
W
W
W
W
0
0
W
0
0
W
Advertisement
Table of Contents
