Renesas Hitachi H8S/2194 Series Hardware Manual page 821

Bit 0: DFG Edge Selection Bit (DRF)
Selects the edge of the NCDFG signal used in the drum speed error detector.
Bit 0
DRF Description
0 Selects the rising edge of NCDFG signal
1 Selects the falling edge of NCDFG signal
(3) Description of Operation
The DFG noise removal circuits generates a signal (NCDFG signal) with a delay circuit as a
result of removing noise (signal fluctuation smaller than 2 φ) from the DFG signal. The
resulted NCDFG signal is behind the time when the DFG signal was detected by 2 φ. Figure
28.71 shows the NCDFG signal.
DFG
NCDFG
2
Rev. 2.0, 11/00, page 794 of 1037
Noise
2
Figure 28.71 NCDFG signal
(Initial value)
2
= fosc