Irq Edge Select Registers (Iegr) - Renesas Hitachi H8S/2194 Series Hardware Manual

6.2.4

IRQ Edge Select Registers (IEGR)

Bit :
—
Initial value :
R/W : —
IEGR is an 8-bit readable/writable register that selects detected edge of the input at pins ,54 to
,54 .
IEGR register is initialized to H'00 by a reset.
Bit 7: Reserved
Do not write 1 to it.
Bits 6 to 2: ,54 ,54 to ,54
These bits select detected edge for interrupts IRQ5 to IRQ1.
Bits 6 to 2
IRQnEG Description
0 Interrupt request generated at falling edge of
1 Interrupt request generated at rising edge of
Bits 1 and 0: ,54 ,54 Pin Detected Edge Select (IRQ0EG1, IRQ0EG0)
These bits select detected edge for interrupt IRQ0.
Bit 1 Bit 0
IRQ0EG1 IRQ0EG0
0 0
0 1
1
*
Note: Don't care
*
7 6 5
IRQ5EG IRQ4EG
0 0 0
R/W R/W
,54 Pins Detected Edge Select (IRQ5EG to IRQ1EG)
Description
Interrupt request generated at falling edge of
value)
Interrupt request generated at rising edge of
Interrupt request generated at both falling and rising edges of
input
4 3
IRQ3EG IRQ2EG IRQ1EG IRQ0EG1 IRQ0EG0
0 0
R/W R/W R/W
,54Q
pin input
,54Q
pin input
Rev. 2.0, 11/00, page 103 of 1037
2 1 0
0 0 0
R/W R/W
(Initial value)
(n = 5 to 1)
,54
pin input (Initial
,54
pin input
,54
pin